1. Field of the Invention
The invention relates to method for simulating behavior of electronic systems under variability and deriving there from adaptations for the production process and/or measures to be taken within the electronic systems for guaranteeing proper performance irrespective of such variability. The method further relates to production processes capable of receiving and using information from the simulation method, electronic systems equipped with such performance guaranteeing methods, accepting and using information obtained with such simulation method.
2. Description of the Related Technology
Technology scaling into the deep sub-micron era is disrupting well-established design practices and flows. Process and material variability introduces functional problems and parametric uncertainty.
New tools enter the design flow to counter its impact, such as design for manufacturing (DFM), a collection of measures aiming to improve functional yield by correctly modeling and providing solutions for systematic manufacturing errors, and statistical static timing analysis (SSTA), and are used for the estimation of the impact of variability on parametric specifications, timing and leakage (see X.-W. Lin, B. Nikolic, P. Habitz, R. Radojcic, “Practical Aspects of Coping with Variability: An Electrical View”, Tutorial at ACM/IEEE Design Automation Conf. 2006; Y. Chen, A. Kahng, G. Robins, A. Zelikovsky, “Area Fill Synthesis for Uniform Layout Synthesis”, IEEE Trans. on CAD of Integrated Circuits and Systems, vol. 21, no. 10, pp. 1132-1147, 2002; P. Gupta, F-L. Heng, “Toward a systematic-variation aware timing methodology”, Proc. ACM/IEEE Design Automation Conference, pp. 321-326, 2004; L. Stok, J. Koehl, “Structured CAD: technology closure for modern ASICs”, Tutorial at IEEE Design Automation & Test in Europe (DATE), 2004; E. Jacobs, M. Berkelaar, “Gate sizing using a statistical delay model”, Proc. IEEE Design Automation & Test in Europe (DATE), pp. 283-290, 2000; C. Visweswariah, K. Ranvindran, K. Kalafala, S. G. Walker, S. Narayan, “First-Order Incremental Block-Based Statistical Timing Analysis”, Proc. ACM/IEEE Design Automation Conf., pp. 331-336, 2004.)
There exists not a sole type of variability. Variability exhibits geometrical or spatial correlation: it may be local (as what is commonly known as “mismatch”) or global (“die to die”, “across wafer”, “wafer to wafer”), random e.g. due to Random Dopant Fluctuations, versus systematic, or non-reproducible versus reproducible.
Moreover, technology, device and circuit variability parameters exhibit complex correlations, which are not easily represented in a generic fashion. Variation of underlying technology parameters may affect devices and circuits in a correlated fashion.
State of the Art EDA tools that handle variability are in the domains of DFM and SSTA. The advent of sub-wavelength lithography has provoked inaccuracies and shape perturbations that influence the properties of the printed devices. Modeling approaches and solution techniques for these problems have been developed. This broad class of tools is known as Design-For-Manufacturing (DFM). It aims to provide models of systematic effects in geometrical imperfections, and solutions that are applied during mask generation and manufacturing (see W. Grobman, R. Tian, E. Demircan, R. Wang, C. Yuan, M. Thompson, “Reticle Enhancement Technology: Implications and Challenges for Physical Design”, ACM/IEEE Proc. Design Automation Conf., pp. 72-78, 2001; [ ] D. Sylvester, P. Gupta, A. B. Kahng, J. Yang, “Toward performance-driven reduction of the cost of RET-based lithography control”, Proc. SPIE, pp. 123-133, 2003.) Examples are Optical Proximity Correction, CMP compensation. DFM tackles predictable, reproducible (“systematic”) effects and impacts functional yield. In recent years, DFM approaches that compensate for the impact of physical distortions on the parametric properties of the device have emerged. They are called electrical DFM. A comprehensive overview of DFM is presented in P. Gupta, A. B. Kahng, “Manufacturing-Aware Physical Design”, Proc. IEEE/ACM Intl. Conference on Computer-Aided Design, pp. 681-687, 2003.
Scaling further into the deep-deep sub micron regime has aggravated problems due to “random variability”. RDF (random dopant fluctuations) and LER (line edge roughness) are representative problems of this class. They are stochastic effects impacting the performance of the transistors.
SSTA (statistical static timing analysis) handles random variability by modeling statistically the impact of random effects on the timing of the circuit. SSTA emerged as a response to the difficulty to achieve timing closure under random variability. It is also used to obtain better estimates for required design margins and guard-bands. Recently commercial SSTA tools also incorporate a statistical estimation of the leakage power consumption of the chip under variability (see R. Rao, A. Devgan, D. Blaauw, D. Sylvester, “Parametric yield estimation considering leakage Variability”, Proc. ACM/IEEE Design Automation Conference, pp. 442-447, 2004; M. Ashouei, A. Chatterjee, A. Singh, V. De, T. Mak, “Statistical estimation of correlated leakage power variation and its application to leakage-aware design”, Proc. Intl. Conf. on VLSI Design, 2006.) This provides the designer a partial view on the power consumption of the chip.
Various DFM techniques have found widespread use, SSTA is still gaining acceptance. One observes that further acceptance of today's variability modeling techniques is hampered by leaving inaccuracy gaps, which preclude the techniques from reaching a comprehensive predictive capability. Challenges are                A systematic treatment of local versus global, systematic (reproducible) versus random (stochastic).        Models need more detail than normal (Gaussian) distributions or linear sensitivities to small signals perturbation can offer. This is more true as perturbations become “large signal”, and distributions can have uncommon shapes.        maintaining correlations of common underlying physical variability sources.        The need to maintain a correlated view between speed performance and static/dynamic power, hence modeling the correlated variability of dynamic energy, static power and speed performance.        